The present invention relates to semiconductor integrated circuits and their manufacture. The invention is illustrated in an example with regard to the manufacture of a "flash" electrically-erasable programmable read only memory ("Flash EEPROM") cell, but it will be recognized that the invention has a wider range of applicability. Merely by way of example, the invention may be applied in the manufacture of other semiconductor devices such as CMOS, microcontrollers, microprocessors, application specific integrated circuits, embedded memory applications, among others.
Industry has used or proposed a variety of memory devices. An example of such a memory device is an erasable programmable read-only memory ("EPROM") device. The EPROM device is both readable, writable, and erasable, i.e., programmable. The EPROM is implemented using a floating gate field effect transistor, which has certain binary states. That is, a binary state is represented by the presence or absence of charge on the floating gate. The charge is generally sufficient to prevent conduction even when a normal high signal is applied to the gate of the EPROM transistor.
A wide variety of EPROMs is available. In a traditional form, EPROMs are programmed electrically and erased by exposure to ultraviolet light. These EPROMs are commonly referred to as ultraviolet erasable programmable read-only memories ("UVEPROM"s). UVEPROMs can be programmed by running a high current between a drain and a source of the UVEPROM transistor while applying a positive potential to the gate. The positive potential on the gate attracts energetic (i.e., hot) electrons from the drain-to-source current, where the electrons jump or inject into the floating gate and become trapped on the floating gate.
Another form of EPROM is the electrically erasable programmable read-only memory ("EEPROM" or "E.sup.2 PROM"). EEPROMs are often programmed and erased electrically by way of a phenomenon known as Fowler-Nordheim tunneling. Still another form of EPROM is a "Flash EPROM," which is programmed using hot electrons and erased using the Fowler-Nordheim tunneling phenomenon. Flash EPROMs can be erased in a "flash" or bulk mode in which all cells in an array or a portion of an array can be erased simultaneously using Fowler-Nordheim tunneling, and are commonly called "Flash cells" or "Flash devices."
Flash memory cells, however, are often bulky and difficult to fabricate in a desired space due to complex geometries of the multiple gate layers used to form the control and floating gates. Accordingly, flash memory cells generally cannot be integrated as tightly or closely as other types of memory devices. Additionally, flash memory cells often require a high gate coupling ratio to achieve desirable programmability and functionality. High gate coupling ratios are often achieved by way of increasing the surface area of the control gate relative to the floating gate while reducing the surface area of the floating gate that is coupled to the channel region of the memory cell. Unfortunately, it is often difficult to increase the gate coupling ratio without significantly increasing the size of the memory cell.
From the above it is seen that a flash memory cell structure that is relatively easy to fabricate, cost effective, and reliable is clearly desired.